Ion implantation is one of several processes performed for manufacturing semiconductor devices. One such semiconductor device may be a complementary metal-oxide-semiconductor (CMOS) device. In manufacturing the device, portions of a semiconductor substrate are implanted with dopants. Generally, dopants may be atoms or molecules with properties that differ from those of the original substrate. Once implanted, the dopants may alter the properties of the implanted regions such that the resulting substrate may have discrete regions with different properties. In addition to the implanted dopants, discrete regions with different properties in the substrate may form by ion implantation as the implantation induces defects.
One method of introducing dopants into a semiconductor substrate is through the use of an ion implanter. An ion implanter includes an ion source for converting a gas or a solid material into a well-defined ion beam. The ion beam typically is mass analyzed to eliminate undesired ion species, accelerated to a desired energy, and implanted into a target. The ion beam may be distributed over the target area by electrostatic or magnetic beam scanning, by target movement, or by a combination of beam scanning and target movement. The ion beam may be a spot beam or a ribbon beam having a long dimension and a short dimension.
With continued miniaturization of semiconductor devices, there has been an increased demand to form smaller regions having more abrupt junctions. For example, tremendous effort has been devoted to creating better activated, shallower, and more abrupt source-drain extension via ion implantation. To create an abrupt, ultra-shallow junction in a crystalline silicon wafer, for example, amorphization of the wafer surface is desirable. Generally, a relatively thick amorphous silicon layer is preferred because fewer interstitials from the ion implant will remain after a solid-phase epitaxial growth as part of a post-implant anneal. A thin amorphous layer can lead to more interstitials residing in an end-of-range area beyond the amorphous-crystalline interface. These interstitials may lead to transient enhanced diffusion (TED) of ion-implanted dopants, causing a resultant dopant profile (e.g., P-N or N-P junction) to deepen and/or lose a desired abruptness. As a result, a thinner amorphous layer can adversely increase short channel effects in electronic devices. The interstitials may also lead to the formation of inactive clusters which, particularly in the case of boron, can reduce dopant activation. The interstitials beyond the amorphous-crystalline interface that are not removed during the activation anneal may combine to form complex end-of-range damage. This damage can lead to junction leakage and yield loss mechanisms. The damage may evolve during later thermal processes by emitting interstitials which can lead to further dopant diffusion and dopant deactivation.
In view of the foregoing, it would be desirable to provide a solution which overcomes the above-described inadequacies and shortcomings.